What do you mean by “beyond just node shrinks”? Is that referring to changing the chip material? I think I read something about graphene I believe?
A node shrink can only do so much, so now they are going for different ways that while they benefit from the node shrink, the different ways of having an increased performance are what’s being looked into.
AMD is doing an MCM for their RDNA3 (supposedly) as an example.
Large amounts of cache are going to be more normal I think.
Things that go beyond just having a better node.
It’s not really easy to know what they would have later on and technology is moving in a different direction.
End of one era and into a new era.
Wonder if stacking could be viable for a console though…
Sidenote: with respect to node, with 8 and 7 and 5nm, the R&D gets progressively more expensive but that’s an upfront cost, the wafer may not be so expensive. The amount of usable does you get
per wafer will vary, with 5nm having the most and 8nm having the least due to space constraints. But you would need to spend for
more wafers on the 7nm and even more on the 8nm to make the same batch as the 5nm, even assuming an +90% yield rate. And the size of each chip gets progressively bigger the lesser so you could be spending more
per unit. 7 (or 6nm) and 5nm aren’t off the table, but 8nm I wouldn’t 100% rule out, just take the 3 nodes as more of a… “it could happen anywhere here” type of thing.
Granted, this ends the extent of my knowledge on the business and logistic side of things based on publicly available information that has been disclosed and piecing things together, so please do not take this as 100% gospel. But more of a… food for thought.