passively cooled and paper specs mean jack shit. which has always been the problem with apple devices. RAM limited and eschewing fans mean a very weird perf profiles.
My point is that it shouldn’t be difficult for Dane to do the same thing
.I think that it’ll be fine, 8N is a variant of the 10nm process but it only came out recently
. 8LPx are older already, but 8N wasn’t available until now last year and only one customer is allowed to use it because it was made specifically for and by then for their use case.Apple’s metrics are off because it’s mostly useless, but it was more pointing that it shouldn’t really be difficult for Dane if that can apparently do similar to the XB1.
in pure flops, I don't think that's possible in a practical sense. even with 256 ampere cores on 8nm, you'd have such a high clock ceiling that you can hit 1TF easily
I agree. But I wouldn't be surprised if some people thought otherwise.I think that it’ll be fine, 8N is a variant of the 10nm process but it only came out recently
Cutting edge also doesn’t always mean the best, just that it’s relatively new. Switch was more cutting edge when it released despite being weaker as a platform.
~13-16MTr/mm^2 I think for 22-20nm vs ~55-60MTr/mm^2 for 10/8nm
The Tegra X1 has ~2 million transistors and has a die size of ~118 mm², which translates to a transistor density of ~16.949 MTr/mm². And the Apple A8 also has ~2 billion transistors and has a die size of 89 mm², which translates to a transistor density of ~22.472 MTr/mm². So I think TSMC's 20 nm** process node has a transistor density of ~23 MTr/mm².
Why?
It’s a bit difficult to target exactly the same situation that Erista had though to be fair, it was on a less efficient mode that everyone moved on from quickly because it had heating issues. And the uArch for the A57 are less efficient than the A78 several fold. A57 ass their first foray into an 8core working and it didn’t work right. By the A75 it was functioning better with the newer uArch to make use of DynamIQ properly.
I think it depends on if Nintendo's okay with a battery life range of 2.5 - 6.5 hours for the DLSS model*. Hypothetically, Nintendo could have kept the Nintendo Switch (2019)'s battery life range the same as the Nintendo Switch (2017), but increase the CPU, GPU, and RAM frequencies. However, Nintendo ultimately kept the Nintendo Switch (2019)'s CPU, GPU, and RAM frequencies the same, which resulted in a ~36.46% - 80% increase in battery life compared to the Nintendo Switch (2017). I think that might be an indication that Nintendo might not be okay with a battery life range of 2.5 - 6.5 hours.
I do find this article on the whole Samsung win of the Tesla HW 4.0 insightful and maybe slightly a little confusing to be honest on Nvidia's end of going with possibly 8nm for Orin. It definitely comes across like Samsung were extremely aggressive in negotiating this win and who knows maybe Nvidia taking the bulk of their business back to TSMC is what sparked this (Qualcomm as well).
There not being a clear indication of the manufacturing process for Orin in any article written is head scratching since any of the recent Tesla HW 4.0 and Samsung articles all mention them being made on Samsung's 7nm. The Tesla Ai event being back in August was well ahead of Nvidia's GTC November event and we now have full specs for both chips.
This quote below in of itself would be the most weird for Nvidia in still choosing 8nm if that pans out. The Tesla 4.0 chip is supposed to be a 645mm², 400w 22Tflop FP32 SoC on Samsung's 7nm process (according to the Tesla team in the video).
"Samsung Electronics plans to mass produce the Tesla HW 4.0 chip at its main Hwasung plant in Korea using the 7-nanometer processing technology in the fourth quarter of this year at the earliest, according to the sources.
The 7 nm process is less advanced than its 5 nm process, but Samsung has decided to use the 7 nm technology to ensure higher production yields and stable functions of the chip when installed on full self-driving (FSD) cars, they said."
Samsung to make Tesla’s HW 4.0 self-driving auto chip - KED Global
SILICON VALLEY – Samsung Electronics Co., the world’s leading chipmaker, will manufacture Tesla Inc.’s next-generation hardware 4 (HW 4.0) chwww.kedglobal.com
I think there's a possibility China Times has confused Dojo with HW 4.0. Ganesh Venkataramanan described Dojo's training tile as a integration of 25 known good D1 dies in a fan out wafer process. And based on the Ganesh Venkataramanan's description of Dojo's training tile, Dylan Patel from SemiAnalysis speculates Tesla is very likely using TSMC's Integrated Fan-Out System-on-Wafer (InFO_SoW) packaging for Dojo's training tile, which I think does suggest that Tesla's using TSMC's 7 nm** process node to fabricate D1 and package Dojo. I think there's a possibility that Tesla's indeed working with Broadcom to design Dojo as the rumour from China Times mentions, considering Google's said to have worked with Broadcom to design the Tensor Processing Unit (TPU). And going by AppleTrack's tracking of the accuracy of China Times, a good amount of rumours tend to be accurate, with some of the rumours tend to not be accurate.
Honestly, it was probably just a production cost consideration. While a smaller battery was required for the Lite model, keeping the same 16Wh battery from the OG Switch in the Mariko model meant they could continue getting volume discounts by maintaining those production orders, which they likely did because they had no use for the extra space that a smaller battery in the standard Switch would give them anyways.
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www.theverge.com
I do think Nintendo thinks battery life is important, but who plays more than 2.5 hrs anyway on handheld straight? I hope Nintendo gets as high clocks as possible
there's nothing about 8nm that says they're limited to 4SM. they can do 6 or even 8SM at lower clocks
Why? It’s a hybrid, it isn’t meant to clock to the max in portable mode.
The device was gonna have a portable mode regardless though, with 4, 6 or even 8SMs so it wasn’t gonna clock higher.
It has to actually get off the ground first for that to be a realistic prospect
90% of the time when I play portal I am plugged in (or could easily be.)
I think most people are willing to make that sacrifice within reason. Again, 38-40 million Switch owners were cool with the battery life the OG was hitting.
Dane is not in the switch code
I've always felt like Nintendo benefits a lot more working with nvidia as their GPU techs are scaled down from their desktop designs and benefit from nvidia's drivers and breakthroughs like DLSS. I feel like its what party made Switch so powerful at launch in 2017, given the Tegra X1 was already in a retail product prior to its launch and was rather mediocre as an android device without the benefit of more dedicated nvn apis Switch has access to.
Thank you so much!
Fully agree! We all like to focus on power, but the software/ hardware package that Nvidia is able to provide is unmatched in the mobile tech industry.
NVIDIA already has an ARM architecture licence
ARM provides licenses that let you make fully custom cores (see: Apple) which I believe Nvidia already has.
Before I start, I want to be very clear that I believe that Nintendo's going to continue working with Nvidia for a very long time for obvious reasons.
I think NineTailSage is talking about a hypothetical scenario where Nvidia would want to acquire a chip designer in the likely scenario where Nvidia's attempt to acquire Arm is blocked, similar to how Qualcomm acquired Nuvia.
You're right we don't know, but i'm just guessing a chip designiner targeting mobile phones will in general not be pushing their hardware in the way Nintendo requires. nVidia on the other hand has experience making drivers for their GPUs pushing them to their limits for gaming, which probably translated well to Nintendo's requirement for a close to the metal APIs being used on the Switch and as far as we can see, the performance improvement over the stock X1 in the SheildTVs running at higher clocks appear to be significant.
Ah, I see.
I don't think Grace is a custom Arm based CPU design since Nvidia mentioned using next-generation Arm Neoverse cores for Grace (Neoverse N2?).
I forgot to mention that one apparent advantage that Imagination Technologies has over Nvidia and AMD is in terms of ray tracing, considering Imagination Technologies claim that IMG CXT achieves level 4 in terms of ray tracing, which stands for "BVH processing with coherency sort in hardware". Nvidia on the other hand apparently achieves level 3 in terms of ray tracing, which stands for "BVH processing in hardware", and AMD apparently achieves level 2 in terms of ray tracing, which stands for "Ray/box and ray/triangle testers". Of course, I don't know how high Nintendo places ray tracing in terms of important hardware features.
Nvidia is actually level 4.
Besides it being mentions as being level 4 (not 3), with respect to the RT hardware I think we should also take the possibility of using said hardware not just for RT but other uses as well, it’s raw compute that is accelerated by hardware.
DavidGraham on Beyond3D believes Nvidia's ray tracing implementation for Turing and Ampere GPUs is at level 3 since level 4 and level 5 apparently require more die space and more specialised hardware. And so far, I haven't found information that mentions that Nvidia's ray tracing implementation is at a level 4. (Perhaps Nvidia's ray tracing implementation is at a level 4 for Lovelace GPUs if what DavidGraham said is true?)
Nvidia's patents mention bundling coherent rays together
forum.beyond3d.com
forum.beyond3d.com
I think we'll be fine, at least when compared to xbone and ps4 base. Nvidia architecture since Maxwell has been known to be really efficient with bandwidth, 64 bit LPDDR5 will put us a double the bandwidth of switch's 25.6 (51.2 GB/s) and that should will put us at xbone level at least. But there's a very good chance we'll get 88-102 GB/s bandwidth if we get 128 bit bus width., which I belive shouldn't be a problem when it comes head to head with PS4 games.
