OKAY! Everyone play the game with me! (Especially the tech informed, unlike myself)
The only thing we don't know at all yet is the nm of the SOC, which will determine clocks and ultimately the real power level (Goku vs Krillin) of The Drake. So let's do a super clean and simplified list of nm=docked specs for fun.
Here's mine:
8nm Samsung = 1.5TF
5nm Samsung = 2 TF
7 nm TSMC = 2.5 TF
6 nm TSMC = 3 TF
5 nm TSMC = 3.5 TF
4 nm TSMC = 4.20 TF
3 nm TSMC = 6.9 TF (lol maybe 5.5?)
So big range! Did i miss any or list one that should be here?
Hmm, what are my current guesses for docked anyway...
First off, I'm excluding Samsung 8nm; I'm not sold that node can deliver a handheld mode with sufficient battery life given what we know of Drake.
Second, I'm excluding this year's version of TSMC's N3; basically, it sounds like a dud. TSMC won't be offering a direct migration path from N3 to N3E, so it seems to be a dead end. And really, given the way TSMC's talked about it recently, I don't expect base N3 to hang around long.
Alrighty then...
CPU clocks; this one is predominantly influenced by node. Probability descriptions will be pulled out of the rear/thought up on the spot.
Samsung 5LPP:
1.1 to 1.3 Ghz. Not an even distribution; think of a bell curve with 1.2 in the middle.
TSMC N7/N6:
1.2 to 1.4 Ghz. Bell curve with 1.3 in the middle.
TSMC N5/N5P/N4:
1.4 to 1.6 Ghz. For N5, bell curve with 1.5 in the middle. For N5P/N4, lower the odds for 1.4 by some amount and evenly shift them over to 1.5 and 1.6.
Docked GPU clocks; not
as influenced by node. I'm actually more concerned with memory bandwidth here.
Base assumption of 102.4 GBps and 8 MB L3 cache:
768 to 1,024 Mhz. Not an even distribution, but not necessarily a bell curve either? Probabilities are tweaked according to the node.
-> Samsung 5LPP: start with a bell curve with 896 in the middle, then shift some from 1,024 to 768. 896 should still have the highest odds.
-> TSMC N7/N6: reverse 5LPP; start with a bell curve, then shift some from 768 to 1,024. 896 still #1.
-> TSMC N5/N5P/N4: see the preceding, but tweak such that 896 and 1,024 end up being even.
Next scenario is 120 GBps (7500 MT/s LPDDR5X) and 8 MB L3 cache:
896 to 1,152 Mhz. Lots of copy and pasting, then replacing numbers. Separately, I progressively get less sold on Samsung 5LPP on delivering a quiet docked mode.
-> Samsung 5LPP: start with a bell curve with 1,024 in the middle, then shift some from 1,152 to 896. 1,024 should still have the highest odds.
-> TSMC N7/N6: reverse 5LPP; start with a bell curve, then shift some from 896 to 1,152. 1,024 still #1.
-> TSMC N5/N5P/N4: see the preceding, but tweak such that 1,024 and 1,152 end up being even.
Then there's the ~136.5 GBps (8533 MT/s LPDDR5X) and 8 MB L3 cache scenario:
1,024 Mhz to 1,280 Mhz. Yadda yadda yadda.
-> Samsung 5LPP: start with a bell curve with 1,152 in the middle, then shift some from 1,280 to 1024. 1,152 should still have the highest odds.
-> TSMC N7/N6: reverse 5LPP; start with a bell curve, then shift some from 1,024 to 1,280. 1,152 still #1.
-> TSMC N5/N5P/N4: see the preceding, but tweak such that 1,152 and 1,280 end up being even.
As for the L3 cache, any theoretical expansion of that doesn't drastically change my expected ranges, but instead serve more to shuffle probabilities around from the lower end towards the upper end.