StarTopic Future Nintendo Hardware & Technology Speculation & Discussion |ST| (New Staff Post, Please read)

[SiG]

Yep. They will say it’s 4k capable, but be quiet about exactly how that is achieved.They will only give the most superficial spec info. Let the games do the talking.

4k is a pretty standardized experience at this point. How it's achieved doesn't really matter considering upscaling isn't anything new, either. See PS4Pro vs. XB1X. In short, 4k is nothing new and not worthy of being the (sole) highlight.

You can expect some gimmick (not partaining to graphics) to be the highlight for the next console.

 

[ReddDreadtheLead]

Somewhat unrelated. Maybe it's just me, I didn't know Orion NX was confirmed with the Jetson name on front and 10, 15 and 25 watt modes with 12GB and 102GB/ bandwidth?
I thought before the big event last year we had that info on it with those 3 power watt modes, but it disappeared and it was some thing else (I remember 8 core A78s and half the GPU power). I dunno. Or more info just got released recently (module?)... At least the 8 core CPU has the same 2MB L2 + 4MB L3.

That info is old, it was revealed with the November info drop.

Unless you’re referring to something else.

Less than 1.5 hrs? that's not great.
IMO the bare minimum a battery life should last is the duration of a whole gaming session (the reasonably longest you'll end up playing in one time), you can likely recharge the unit after.
A gaming session longer than 1.5 hrs isn't unreasonable for me.

It really is very low. Nintendo will go for a longer battery life for good reason. The Steam deck while powerful as a portable, is very limited if you wanted to use it for long whiles as it has to be clocked to a lower frequency.

So, at these lower clocks of the Steam deck, it should be on par with the Steam deck in CPU.

But these are for the most demanding titles anyway.

Dane will come swinging.

And they are cutting RAM from Orion NX from 32GB(?) to 12, as well has a 6-8 core CPU--likely performing at around 1-1.5GH per core. That should get it into a a 15 watt range I think.

Orin AGX is the big Orin and has 32GB of RAM. ORIN NX is the smaller one and comes with 12GB of RAM. Always has been set up that way.

8 SM'S? 1024 Cuda Cores? So you think it's going for exactly half a GCU?

I'd be pretty pleased with 6/around Durango Xbox shader counts honestly.

Any chance anyone have an idea of the texture mappers and rops that would be paired with this config off the top of their heads?

I’d temper the expectations of 8SMs to be honest, those are just the most optimistic of speculation and not everyone actually holds those views. Most of us are expecting a range of 4-6SMs clocked between 400-800MHz (portable and docked mode), 6-8 CPU cores (1-1.5GHz range) that could be 4big cores + 4 little cores, 4big cores + 2 little cores, 6big cores + 2 little cores or just 8 big cores. Memory we expect 128-bit LPDDR5 RAM for 88-102GB/s for portable and docked mode with availability of 6-12GB system memory where 1GB is dedicated to the OS and the 5-11GB is for developers. And on the 8nm node.

These are ranges of course. Storage configuration is an unknown but we assume at least an eMMC.

As for the TMUs and ROPs, it’s difficult to pinpoint I’d say. Per GPC for the consumer grade cards such as GA102, Ampere has 16 ROPs and 48TMUs. But for the datacenter version of Ampere such as GA100 there are 24ROPs and 64TMUs per GPC. While GA104 has 32TMUs and 16ROPs. GA106 on the other hand has 40 TMUs per GPC while 16 ROPs per GPC. And GA107/7s have the same TMU and ROP set up as GA104.

 

[Deleted member 1324]

That is not how production works at all.

• Devkits have been out since 2020.
• Exclusives are timed for Fall 2022 or Early 2023.
• Orin is out soon/now (at least being put into cars)
• Switch Sales are already dipping trendwise.

You don't just tell devs "Oh yeah target this window" then less than a year from that window for these big titles say "Oh nevermind push it back another freaking year"

That's how you kill the third-party trust Nintendo has built up with the Switch.

No need to be condescending…

How production works has changed dramatically in the last two years due to Covid.

Switch hardware sales are only dropping because of the issues above. If they had millions more OLED units then they would be sold same as PS5. Switch hardware was boosted massively in 2020 due to a combination of Covid lockdowns and Animal Crossing and in 2021 it still managed to get to within touching distance of 2020 hardware sales.

 

[ILikeFeet]

I feel that the imminent release of the Steam Deck just makes people's expectation of a Switch successor to be much higher, and they're also expecting it to be priced competitively. Keep in mind that Valve is took pains (i.e. sold at a loss) to get their console within those price brackets...

So yeah, I'm expecting new people here to be swarming with posts about "Is the next Switch going to be as powerful as the Steam Deck" to which I'll say right away "Probably not". To which said newcomers will probably be "Bah! Switch sucks, I hope they become 3rd party etc." and the cycle continues.

At the same time, I'm glad Valve are releasing their own affordable gaming PCs (the Deck is pretty much considered a PC) that won't be scalped for GPU mining. Then again, miners/scalpers will probably find a way or something...

I think the $499 or whatever the cheapest priced SD is is what's throwing people off. it's sort of a gotcha, the starting price is so low to make people step up to the higher priced model. and it does work, even for the SD as most people are buying into the $600+ model than the entry priced model. Valve might have been pained to get so low, but they'll take solace in that not many people are buying that.

 

[Dakhil]

So greymon55 mentioned there's not much difference between the Lovelace architecture and the Ampere architecture.


kopite7kimi also mentioned that the Lovelace architecture is roughly similar to the Ampere architecture more than half a year ago.

 

[ILikeFeet]

I think we'll see Orin's RT core setup reflected in Lovelace. it's possible that 1RTC per SM was to counteract some issue elsewhere. maybe clock speed

 

[bloopland33]

I wonder if any of the third party games (presumably ports) we'll learn about today will be any of the ones that Nate's referred to or Bloomberg has referenced as targeting H2 2022 from those 11 devs.

Edit: if memory serves actually Nate's games were mostly (all?) Dane exclusive so scratch that part. But since Bloomberg's games are apparently still targeting base Switch this year, still wonder if these will be one of them unbeknownst to us.

 

[Dakhil]

I wonder if any of the third party games (presumably ports) we'll learn about today will be any of the ones that Nate's referred to or Bloomberg has referenced as targeting H2 2022 from those 11 devs.

I doubt it since I imagine Nintendo would want to save those announcements to when Nintendo formally announces the DLSS model*, or after, assuming Nintendo's still planning a holiday 2022 launch.

 

[Hosermess]

I wonder if any of the third party games (presumably ports) we'll learn about today will be any of the ones that Nate's referred to or Bloomberg has referenced as targeting H2 2022 from those 11 devs.

Edit: if memory serves actually Nate's games were mostly (all?) Dane exclusive so scratch that part. But since Bloomberg's games are apparently still targeting base Switch this year, still wonder if these will be one of them unbeknownst to us.

Pretty sure he mentioned only knowing 1 game being exclusive to just the Dane Switch.

 

[bloopland33]

I doubt it since I imagine Nintendo would want to save those announcements to when Nintendo formally announces the DLSS model*, or after, assuming Nintendo's still planning a holiday 2022 launch.

I hear that, but based on Bloomberg's wording last week, it sounds at least some of those games (or all of them) from those "10+ devs" might just be getting the Dane patch treatment after the fact - not the big 'Dane launch treatment' like I'd imagined some games could get, like an RE7 or an AC Origins.

If they're still coming to base Switch, as Bloomberg says, maybe a Dane patch later in the year is just a nice little announcement they get to throw out later.

For example, I'm really curious if Arkham Knight is one of the games Mochizuki knows about, if it is indeed part of the leaked collection...odds are it's probably not a Dane-enhanced title, of course, but if it were, I wouldn't be that surprised to see it today and then over the summer "oh great! It's got a Dane profile too!" when they can say that. Or it's in a sizzle reel in Dane's announcement, etc. What have you.

 

[minimalism]

I find your posts very interesting. What kind of products are you working on if you dont mind me asking? The only thing I can think of which has 30 years lifetime and 10 years design is military,

Nail on the head there, military products. Can't say too much about it, but I work the civie side of it so at least avoid (some) of the red tape.

 

[minimalism]

The theory that Switch OLED was a last minute sawp is definitely something that's been floating around, but there's not really any evidence to back it up. The hardware config indicated it would use the Mariko SoC since the moment it appeared in public firmware builds in early 2020.

I can certainly be wrong (and since all we can do is speculate, I likely am) but haven't there been a few configurations that firmware listed that have never existed? I remember all the discussion about the docked only config listed in the firmware a couple years ago.

 

[Hosermess]

I hear that, but based on Bloomberg's wording last week, it sounds at least some of those games (or all of them) from those "10+ devs" might just be getting the Dane patch treatment after the fact - not the big 'Dane launch treatment' like I'd imagined some games could get, like an RE7 or an AC Origins.

Yeah, because it was tagged on at the end of the article, I think that more general wording was just to keep him out of trouble this time. I'm assuming the 10+ games are (mostly) the same ones he wrote about in the '11 studios with devkits' article. Though the phrasing of "they are preparing major games for the five-year-old platform this year" doesn't indicate they'll be released this year, so I'd be surprised if any of them get announced today. Maybe a tease if it's a massive title.

 

[ILikeFeet]

how can Dane even compete with 18GB of ram!?

Lenovo Legion Y90 screenshots reveal more specs, confirm 18 GB RAM

The screenshots are posted by a Product Director at Lenovo. The Legion Y90 is going to be the next gaming smartphone in Lenovo’s portfolio, and is aiming...

www.gsmarena.com

how the fuck you even fit 18GB of ram

 

[Hermii]

how can Dane even compete with 18GB of ram!?

Lenovo Legion Y90 screenshots reveal more specs, confirm 18 GB RAM

The screenshots are posted by a Product Director at Lenovo. The Legion Y90 is going to be the next gaming smartphone in Lenovo’s portfolio, and is aiming...

www.gsmarena.com

how the fuck you even fit 18GB of ram

Man, that’s crazy. And there is no way Dane will even try to compete.

 

[NineTailSage]

8 SM'S? 1024 Cuda Cores? So you think it's going for exactly half a GCU?

I'd be pretty pleased with 6/around Durango Xbox shader counts honestly.

Any chance anyone have an idea of the texture mappers and rops that would be paired with this config off the top of their heads?

8SM should probably equate to 32 TMU's and 16ROP's

I’d temper the expectations of 8SMs to be honest, those are just the most optimistic of speculation and not everyone actually holds those views. Most of us are expecting a range of 4-6SMs clocked between 400-800MHz (portable and docked mode), 6-8 CPU cores (1-1.5GHz range) that could be 4big cores + 4 little cores, 4big cores + 2 little cores, 6big cores + 2 little cores or just 8 big cores. Memory we expect 128-bit LPDDR5 RAM for 88-102GB/s for portable and docked mode with availability of 6-12GB system memory where 1GB is dedicated to the OS and the 5-11GB is for developers. And on the 8nm node.

These are ranges of course. Storage configuration is an unknown but we assume at least an eMMC.

As for the TMUs and ROPs, it’s difficult to pinpoint I’d say. Per GPC for the consumer grade cards such as GA102, Ampere has 16 ROPs and 48TMUs. But for the datacenter version of Ampere such as GA100 there are 24ROPs and 64TMUs per GPC. While GA104 has 32TMUs and 16ROPs. GA106 on the other hand has 40 TMUs per GPC while 16 ROPs per GPC. And GA107/7s have the same TMU and ROP set up as GA104.

The Van Gogh apu in the Steam Deck has a roughly 162mm2 die size on 7nm, I think an 8 core CPU/8SM Dane on 8nm could come in under that size. Even if the Ampere architecture takes up more die space than RDNA2, ARM cores should balance some of that out between the Zen2 cores in Van Gogh.



I believe the structure for all of the GA102, 104, 106 and 107 are 12SM's per GPC and some of those variations are cut down from their full chip.
The TMU's and Tensor core amounts are equal to their respective SM (which both equal 4TMU's and 4Tensor cores per SM).
The math seems to work out for Ampere that there are either 16 or 24ROP's allocated per GPC, GA102 and 106 seems like their ROP's are (16), while GA104 and 107 seem to be (24) per GPC.

 

[Crusters]

I'm currently wondering what the difference in chips per wafer yield would be between a 4,6, and 8 sm Dane.

 

[Dakhil]

I hear that, but based on Bloomberg's wording last week, it sounds at least some of those games (or all of them) from those "10+ devs" might just be getting the Dane patch treatment after the fact - not the big 'Dane launch treatment' like I'd imagined some games could get, like an RE7 or an AC Origins.

If they're still coming to base Switch, as Bloomberg says, maybe a Dane patch later in the year is just a nice little announcement they get to throw out later.

For example, I'm really curious if Arkham Knight is one of the games Mochizuki knows about, if it is indeed part of the leaked collection...odds are it's probably not a Dane-enhanced title, of course, but if it were, I wouldn't be that surprised to see it today and then over the summer "oh great! It's got a Dane profile too!" when they can say that. Or it's in a sizzle reel in Dane's announcement, etc. What have you.

NateDrake mentioned that games developed for the DLSS model* are targeting completion in late 2022. And Nintendo specifically said that today's Nintendo Direct's primarily focused on Nintendo Switch games releasing in 1H 2022. The only games I could see being announced during today's Nintendo Direct that's potentially targeting 2H 2022 are Nintendo's own games, not third party games.

I'm currently wondering what the difference in chips per wafer yield would be between a 4,6, and 8 sm Dane.

Generally speaking, the less complex components there are in a chip, the higher the yields for that chip.

 

[NineTailSage]

I'm currently wondering what the difference in chips per wafer yield would be between a 4,6, and 8 sm Dane.

That's why most of us keep stating that a 8SM GPU with a lower clock would most likely provide much better yields than a smaller 4 or 6SM part that needs to run higher on Samsung's 8nm... Certain manufacturing processes become more inefficient as TDP increases and they aren't all created equal in that aspect, which definitely proves this just between how high RDNA2 can be clocked on TSMC's 7nm vs Ampere on Samsung's 8nm process.

 

[Crusters]

That's why most of us keep stating that a 8SM GPU with a lower clock would most likely provide much better yields than a smaller 4 or 6SM part that needs to run higher on Samsung's 8nm... Certain manufacturing processes become more inefficient as TDP increases and they aren't all created equal in that aspect, which definitely proves this just between how high RDNA2 can be clocked on TSMC's 7nm vs Ampere on Samsung's 8nm process.

So there is precedence for Samsung's 8nm yields having trouble with chips rolling out that can clock to the higher frequency spec that would be needed for a lower sm chip vs a higher sm chip that doesn't need to clock up, costing them yield per wafer, that could offset or even be enough to overcome the footprint size yield advantage of 4 or 6 sm?

Every chip counts more than ever right now.

 

[Dakhil]

So there is precedence for Samsung's 8nm yields having trouble with chips rolling out that can clock to the higher frequency spec that would be needed for a lower sm chip vs a higher sm chip that doesn't need to clock up, costing them yield per wafer, that could offset or even be enough to overcome the footprint size yield advantage of 4 or 6 sm?

Every chip counts more than ever right now.

Considering I never heard any story and any rumour about Samsung's 8 nm** process node having yield issues with mobile SoCs, probably not.

 

[Crusters]

Considering I never heard any story and any rumour about Samsung's 8 nm** process node having yield issues with mobile SoCs, probably not.

Then I personally don't feel like the 8sm path is as likely. My gut says it's a fever pitched battle in the halls of Nintendo between really wanting the production logistics of 4sm, and needing the bare minimum performance of 6sm.

 

[Pokemaniac]

I can certainly be wrong (and since all we can do is speculate, I likely am) but haven't there been a few configurations that firmware listed that have never existed? I remember all the discussion about the docked only config listed in the firmware a couple years ago.

There are two unreleased "TV only" configs, which are believed by some to be some sort of internal test boards and not intended to be a real product, but they use the same two chips that were used in the released Switches, Erista and Mariko. There has been no config in the public firmware for Dane yet. Why there's no config remains to be seen, but there is some circumstantial evidence that Dane may be getting its own firmware builds, since suspicious numbers of stubbed syscalls have been showing up in the Switch kernel.

 

[NineTailSage]

Considering I never heard any story and any rumour about Samsung's 8 nm** process node having yield issues with mobile SoCs, probably not.

To be fair there were many stories in the past of Exynos processors not measuring up to Snapdragon chips performance using a similar ARM setup(if I can locate some of the articles I will post them). Samsung were constantly under-clocking their CPU's when 10 and 8nm designs first came on the scene...

"All in all, the Exynos 9820 delivers much-needed upgrades over the Exynos 9810, especially in the CPU department. The SoC's neural capabilities look promising, but a lack of details makes it difficult to determine the range of its performance. Additionally, Samsung's 8LPP doesn't sound promising, but the Exynos 9820 might lay a solid foundation for a 7nm EUV successor that some quarters claim is destined for the second half of this year."

Because Switch is a hybrid device makes 8nm a decent enough node to transition from the current model onto a new performance base, that will then lead into what comes next...

 

[Dakhil]

To be fair there were many stories in the past of Exynos processors not measuring up to Snapdragon chips performance using a similar ARM setup(if I can locate some of the articles I will post them). Samsung were constantly under-clocking their CPU's when 10 and 8nm designs first came on the scene...

"All in all, the Exynos 9820 delivers much-needed upgrades over the Exynos 9810, especially in the CPU department. The SoC's neural capabilities look promising, but a lack of details makes it difficult to determine the range of its performance. Additionally, Samsung's 8LPP doesn't sound promising, but the Exynos 9820 might lay a solid foundation for a 7nm EUV successor that some quarters claim is destined for the second half of this year."

I think that has to do more with the designs of the M4 cores on the Exynos 9820 not being very good in comparison to the Cortex-A76 on the Snapdragon 855, going by Anandtech's review of the Exynos 9820, rather than Samsung's 8 nm** process node.

And in general, I think Samsung Electronics' designs so far are not very good, considering that Samsung Electronics' implementation of Arm's Cortex-X1 and the Cortex-A55 consume more power and are less performant in comparison to Qualcomm's and Mediatek's implementation (for the Cortex-A55).

 

[Alovon11]

That's why most of us keep stating that a 8SM GPU with a lower clock would most likely provide much better yields than a smaller 4 or 6SM part that needs to run higher on Samsung's 8nm... Certain manufacturing processes become more inefficient as TDP increases and they aren't all created equal in that aspect, which definitely proves this just between how high RDNA2 can be clocked on TSMC's 7nm vs Ampere on Samsung's 8nm process.

Not to mention with how Orin's GPCs are organized they sort of have to have 8SMs of space on the die anyway as that is as small as it gets, the only way to drop the core count further is by fusing off SMs via binning but that still leaves the space the binned SMs take up, well, taken up

So if they are locked into having 8SMs on-die, why not just use them and clock them lower as that is just the outright better option?

 

[NineTailSage]

I think that has to do more with the designs of the M4 cores on the Exynos 9820 not being very good in comparison to the Cortex-A76 on the Snapdragon 855, going by Anandtech's review of the Exynos 9820, rather than Samsung's 8 nm** process node.

And in general, I think Samsung Electronics' designs so far are not very good, considering that Samsung Electronics' implementation of Arm's Cortex-X1 and the Cortex-A55 consume more power and are less performant in comparison to Qualcomm's and Mediatek's implementation (for the Cortex-A55).

It could be a combination of things, but even Qualcomm's own design manufactured on Samsung's 8nm process were clocked closer to 2Ghz as well... It definitely seems like there's just a certain threshold of where transistors become very inefficient and maybe this is also why Nvidia aren't getting anywhere close to the transistor density Samsung were achieving with their 8nm Exynos designs.

 

[NineTailSage]

Not to mention with how Orin's GPCs are organized they sort of have to have 8SMs of space on the die anyway as that is as small as it gets, the only way to drop the core count further is by fusing off SMs via binning but that still leaves the space the binned SMs take up, well, taken up

So if they are locked into having 8SMs on-die, why not just use them and clock them lower as that is just the outright better option?

Orin Ampere definitely has me extra interested to see if these changes transfer over to Lovelace and if this is a major proponent (along with TSMC's 5nm process) of the performance over current desktop Ampere.

 

[Crusters]

Not to mention with how Orin's GPCs are organized they sort of have to have 8SMs of space on the die anyway as that is as small as it gets, the only way to drop the core count further is by fusing off SMs via binning but that still leaves the space the binned SMs take up, well, taken up

So if they are locked into having 8SMs on-die, why not just use them and clock them lower as that is just the outright better option?

Ok, this is big deal to me. I feel like flip flops.

So half a GCU ... GPC?.... Half the cluster is as small as you can physically get with the design, and any further reductions in sm will not reduce footprint, or provide any logistical production benefit?

This seems like a very very strong reason for 8sm to me. Wider and lower clocked is better for battery life anyway.

 

[Dekuman]

I wonder too if a Pro Switch 2 will just end up being a Lovelace SoC but that would require a very fast turnaround on development of the mobile soc uncharacteristic of nvidia

But honestly Nintendo gotta get some pull here instead of having their entire road map locked up with nvidias product launches

 

[Alovon11]

Ok, this is big deal to me. I feel like flip flops.

So half a GCU ... GPC?.... Half the cluster is as small as you can physically get with the design, and any further reductions in sm will not reduce footprint, or provide any logistical production benefit?

This seems like a very very strong reason for 8sm to me. Wider and lower clocked is better for battery life anyway.

The only reason to reduce the SM count past 1 GPC for NVIDIA at least is is because of hardware design flaws that prevent the system from handling the SMs of that GPC.

And the SMs are still there just fused off

We even see this with the TX1, it has 4SMs and Maxwell had 4SMs per GPC

 

[Tentacle-tropes]

Yeah, I do say Dane likely will be more like the 3DS at launch, but able to handle the stress of the price point due to the OG Switch still being supported

Nintendo's most likely play is to have the gap between Dane's release and Eristra/Mariko EoL be high enough in order to have the costs for Dane to drop to the point a more entry-level model can make a profit for when OG Switches hit EoL.

Personally speaking I think Dane will be profitable in the same way Lite was initially. When looking at their profits when it first released it contributed but was muted due to being a lower margin device. I don’t think they wanna repeat the 3DS-WiiU situation again where it led to their only time in the red.

 

[Crusters]

The only reason to reduce the SM count past 1 GPC for NVIDIA at least is is because of hardware design flaws that prevent the system from handling the SMs of that GPC.

We even see this with the TX1, it has 4SMs and Maxwell had 4SMs per GPC

I thought Orin had 16sm per cluster?

 

[Alovon11]

I thought Orin had 16sm per cluster?

It's 2 GPCs for big Orin.

8SMs per GPC

 

[Tentacle-tropes]

I wonder too if a Pro Switch 2 will just end up being a Lovelace SoC but that would require a very fast turnaround on development of the mobile soc uncharacteristic of nvidia

But honestly Nintendo gotta get some pull here instead of having their entire road map locked up with nvidias product launches

What pull are you expecting them to get? Unless the leave Nvidia they will always be locked onto their roadmap. And, unless they also change their thinking I am not sure if it is wise to use either brand new or slightly less brand new.

 

[Crusters]

It's 2 GPCs for big Orin.

8SMs per GPC

And the peices in my mind fall into place.

 

[Alovon11]

And the peices in my mind fall into place.

There's a reason I've been arguing for 8SM Dane as the most likely config.

It just is unreasonable considering the design and price to think they would want to go for fewer than 8SMs as a 4 or 6SM config would waste space, be less efficient, and it would cost way more to forcibly shave space back with a 4 or 6SM config versus just sticking to the Orin uArch's definition of a GPC at 8 SMs of space and reducing the clock speed

The only scenario dropping below 8SMs would make sense is for a Dane Lite with a Binned Dane SoC with the SM and Clock set to match 8SM Dane's Portable mode.

The chips coming from failed Dane SoCs that have 1 SM being bad

 

[Crusters]

There's a reason I've been arguing for 8SM Dane as the most likely config.

It just is unreasonable considering the design and price to think they would want to go for fewer than 8SMs as a 4 or 6SM config would waste space, be less efficient, and it would cost way more to forcibly shave space back with a 4 or 6SM config versus just sticking to the Orin uArch's definition of a GPC at 8 SMs of space and reducing the clock speed

The only scenario dropping below 8SMs would make sense is for a Dane Lite with a Binned Dane SoC with the SM and Clock set to match 8SM Dane's Portable mode.

The chips coming from failed Dane SoCs that have 1 SM being bad

Yeah, this resonates with me. I feel right now, the path to highest throughput is even more of your best bet to land on the money than normal, considering the production environment.

If lowering the SM'S does not accomplish that, pursuing that path seems like wasting time and resources to me.

 

[Look over there]

how can Dane even compete with 18GB of ram!?

Lenovo Legion Y90 screenshots reveal more specs, confirm 18 GB RAM

The screenshots are posted by a Product Director at Lenovo. The Legion Y90 is going to be the next gaming smartphone in Lenovo’s portfolio, and is aiming...

www.gsmarena.com

how the fuck you even fit 18GB of ram

Such a peculiar density, unless they went hard with the bus width and end up with like 192-bit.
I'm still a bit skeptical of SK Hynix's '18 GB' LPDDR5, as the announcement press release cites them supplying 18 GB LPDDR5 for the ASUS ROG 5, but the highest config for that phone is 16 GB from what I can see.

But I'm more surprised by the '+4 GB'. The article says that's 'part of the new trendy feature' using some storage as memory.
...Page/swap files are a new trend for smartphones?

 

[Dekuman]

What pull are you expecting them to get? Unless the leave Nvidia they will always be locked onto their roadmap. And, unless they also change their thinking I am not sure if it is wise to use either brand new or slightly less brand new.

Heavily customized chip just for them. But for cost reasons this seems unlikely.

Even PS5 and Xbox GPU are off the shelf with some customizations which is what Dane is supposed to be.

 

[Dakhil]

It could be a combination of things, but even Qualcomm's own design manufactured on Samsung's 8nm process were clocked closer to 2Ghz as well... It definitely seems like there's just a certain threshold of where transistors become very inefficient and maybe this is also why Nvidia aren't getting anywhere close to the transistor density Samsung were achieving with their 8nm Exynos designs.

Qualcomm's 8 nm** SoCs aren't exactly comparable to the Exynos 9820 since all of the Qualcomm's 8 nm** SoCs are mid-range SoCs, and use only two performance CPU cores (here, here, here, and here). And the Exynos 9820 is a flagship SoC with two M4 cores and two Cortex-A75 cores used as performance cores.

Also, unlike mobile SoCs, high performance computing (HPC) chips, such as GPUs, generally don't use high density cell libraries.
The Apple A13 Bionic has a transistor density of ~86.312 MTr/mm² ([8.5 billion transistors]/[98.48 mm²]). On the other hand, Navi 21 has a transistor density of ~51.607 MTr/mm² ([26.8 billion transistors]/[519.31 mm²]). As shown, Navi 21 is ~50.33% less dense than the Apple A13 Bionic, or ~55.45% less dense than TSMC's N7P process node's theoretical max transistor density of 91.20 MTr/mm². (The Apple A13 Bionic and Navi 21 (probably) were fabricated using TSMC's N7P process node.)
Considering that GA102 has a transistor density of ~43.614 MTr/mm² ([28 billion transistors]/[~642 mm²]), GA102 being ~33.52% less dense than Samsung's 8LPP process node's theoretical max transistor density of 61.18 MTr/mm² sounds about right and is actually not bad.

I'm still a bit skeptical of SK Hynix's '18 GB' LPDDR5, as the announcement press release cites them supplying 18 GB LPDDR5 for the ASUS ROG 5, but the highest config for that phone is 16 GB from what I can see.

I think SK Hynix's referring to the ASUS ROG Phone 5 Ultimate.

 

[Tentacle-tropes]

Heavily customized chip just for them. But for cost reasons this seems unlikely.

Even PS5 and Xbox GPU are off the shelf with some customizations which is what Dane is supposed to be.

I would imagine there may be minor customizations to the chip but even beyond costs reasons I doubt Nvidia want to design something widely different from what they currently make.

 

[ILikeFeet]

But I'm more surprised by the '+4 GB'. The article says that's 'part of the new trendy feature' using some storage as memory.
...Page/swap files are a new trend for smartphones?

probably because storage is now fast enough to better support it

 

[Alovon11]

probably because storage is now fast enough to better support it

Not to mention the distance between the Storage in phones and the SoC is more or less equal to the distance to the RAM, unlike PCs which have to communicate across the PCIE-Bus or worse SATA for Page Files on PC.

 

[Look over there]

I think SK Hynix's referring to the ASUS ROG Phone 5 Ultimate.

Hmm, so it is 18 GB. Best I can find regarding bus width is that it's 'double channel' from devicespecifications. LPDDR5 should be no higher than 32 bit per channel, so that would be 64-bit wide... pretty dense module there. Or the site's using the DDR4-and-older definition of 'channel' and it's 128-bit wide in total for a pair of 64-bit 9 GB modules. Still an odd density.

probably because storage is now fast enough to better support it

Not to mention the distance between the Storage in phones and the SoC is more or less equal to the distance to the RAM, unlike PCs which have to communicate across the PCIE-Bus or worse SATA for Page Files on PC.

Ehhh, yea, true.
SSDs on PC have latency ranging from tens of to hundreds of microseconds. So I guess the reduced distance in phones could cut it down by... I dunno, an order of magnitude or two?

 

[Deleted member 1324]

I'm guessing the rumoured third party Dane exclusive might be Kena even if MS or Sony buy Ember Labs.

 

[Thraktor]

Yeah, especially with TSMC's N7+ process node not being IP compatible with TSMC's N7 process node, and with the Kirin 990 5G being the only chip publicly announced to be fabricated using TSMC's N7+ process node. (AMD clarified that TSMC's N7+ process node wasn't necessarily used for the fabrication of Zen 3 CPUs.)

I'm curious about how Dane would perform in terms of performance and power efficiency if TSMC's N6 process node is used for the fabrication of Dane, especially since TSMC's N6 process node, unlike TSMC's N7+ process node, is IP compatible with TSMC's N7 process node. Although I believe TSMC's N6 process node being used for the fabrication of Dane is probably an unlikely scenario, I also believe TSMC's N6 process node's the absolute best case scenario in a hypothetical scenario where Nintendo and Nvidia decide to use TSMC.

I was thinking about this as well, and there are a few data points we can use to estimate the difference between Samsung's 8N process and TSMC's N6. On the transistor density side it's fairly easy to estimate, as we know that all of Nvidia's Ampere parts have come in at around 45MT/mm2, with Orin coming in at 45.6MT/mm2, so it's extremely likely that Dane will have a similar density if and when it's manufactured on 8nm. Meanwhile, I'm not aware of any actual transistor density measurements from N6 chips, but TSMC claim that it offers 18% higher density than their (non-EUV) N7 process. Nvidia manufacture the A100 GPU on the N7 process, and it comes in at 65.6MT/mm2, so we could estimate that a Nvidia chip on N6 would hit around 77.4MT/mm2. This is about 70% higher transistor density than they're getting on Samsung 8N. Of course the density scaling might not be exactly what TSMC claim, and a gaming SoC may not line up exactly in logic density with a HPC GPU, but it's probably a reasonably close estimate.

For power consumption it's a bit trickier. We do have the Mediatek Dimensity 1100 and 1200, and the Qualcomm Snapdragon 778G phone SoCs, which are manufactured on N6 and feature A78 CPU cores, but it's difficult to get precise power measurements for them. I found reviews of phones featuring the Dimensity 1200 and Snapdragon 778G including power measurements during Geekbench runs here and here. However these are full system power measurements, and due to the unclear testing methodology (they don't specify whether it's single-core or multi-core Geekbench) and seeming inconsistencies (eg the lower-clocked 778G based phone seeing much larger power consumption spikes than the higher-clocked Dimensity 1200 based phone), it's not really enough to make any conclusions from, unfortunately.

 

[Dakhil]

Meanwhile, I'm not aware of any actual transistor density measurements from N6 chips, but TSMC claim that it offers 18% higher density than their (non-EUV) N7 process. Nvidia manufacture the A100 GPU on the N7 process, and it comes in at 65.6MT/mm2, so we could estimate that a Nvidia chip on N6 would hit around 77.4MT/mm2. This is about 70% higher transistor density than they're getting on Samsung 8N. Of course the density scaling might not be exactly what TSMC claim, and a gaming SoC may not line up exactly in logic density with a HPC GPU, but it's probably a reasonably close estimate.

Well, David Schor from Fuse WikiChip estimates that TSMC's N6 process node has a max transistor density of 114.2 MTr/mm².

Anton Shilov from Tom's Hardware estimates that each GPU die on the AMD MI200 GPU has a die size of ~790 mm². And AMD mentioned that each GPU die on the AMD MI200 GPU has 29.1 billion transistors. So each GPU die on the AMD MI200 GPU should have a transistor density of roughly ~36.385 MTr/mm² ([29.1 billion transistors]/[~790 mm²]), or a total transistor density of roughly ~73.671 MTr/mm² (2 * [29.1 billion transistors]/[~790 mm²]), since the AMD MI200 GPU has a total of two GPU dies.

 

[Vash_the_Stampede]

I was thinking about this as well, and there are a few data points we can use to estimate the difference between Samsung's 8N process and TSMC's N6. On the transistor density side it's fairly easy to estimate, as we know that all of Nvidia's Ampere parts have come in at around 45MT/mm2, with Orin coming in at 45.6MT/mm2, so it's extremely likely that Dane will have a similar density if and when it's manufactured on 8nm. Meanwhile, I'm not aware of any actual transistor density measurements from N6 chips, but TSMC claim that it offers 18% higher density than their (non-EUV) N7 process. Nvidia manufacture the A100 GPU on the N7 process, and it comes in at 65.6MT/mm2, so we could estimate that a Nvidia chip on N6 would hit around 77.4MT/mm2. This is about 70% higher transistor density than they're getting on Samsung 8N. Of course the density scaling might not be exactly what TSMC claim, and a gaming SoC may not line up exactly in logic density with a HPC GPU, but it's probably a reasonably close estimate.

For power consumption it's a bit trickier. We do have the Mediatek Dimensity 1100 and 1200, and the Qualcomm Snapdragon 778G phone SoCs, which are manufactured on N6 and feature A78 CPU cores, but it's difficult to get precise power measurements for them. I found reviews of phones featuring the Dimensity 1200 and Snapdragon 778G including power measurements during Geekbench runs here and here. However these are full system power measurements, and due to the unclear testing methodology (they don't specify whether it's single-core or multi-core Geekbench) and seeming inconsistencies (eg the lower-clocked 778G based phone seeing much larger power consumption spikes than the higher-clocked Dimensity 1200 based phone), it's not really enough to make any conclusions from, unfortunately.

Hey, I used to read your post back on resetera. And I came across one of your prior arguments that 8 nm could be older than 20 nm was when the original switch launched.
Could you share how your perspective/forecast on the hardware of the next switch has changed over the last 12 months or so?

 

[Sol]

I know a lot of people were expecting Mario Kart 9/10 to be a launch title for the Switch 2.....and today it was revealed that MK8 is getting 6 massive DLC expansions until 2023.

It's an interesting and unexpected development, and I'm wondering what this means for Mario Kart 9/10 and the next Switch. A new MK now seems like it's a long ways off, and may not even be in development yet. And what that would mean for a Switch 2 given that Nintendo would probably want a new MK game to accompany the launch....I'm not sure.