Is there any way to view all of these details on the minutiae of T239?
There are so many summary posts, but I actually couldn't find one that lined up with this, probably because it's pretty in the weeds, even for this thread. Lemme throw one together for you. Going mostly by memory here (which is a little horrifying), so folks may need to correct me
CPU:
8x
A78C cores in a single cluster.
L3 Cache: unknown, up to 8MB
Clock speeds: Unknown
GPU:
1 Ampere GPC, pretty much exactly the stock desktop RTX 30 design
- 6 TPC/12 SM/1536 Cuda Cores
- 48 Tensor cores
- 12 RT cores
- 48 Texture Mapping Units
- 16 Raster Operation Units
- Clock unknown
Memory Architecture:
LPDDR5*, 128-bits wide
2x64 bit modules
Max 102GB/s of bandwidth
1 MB of L2 Cache**
*possibly 5x, max 135 GB/s
** possible 4 MB
Note: T239 supports a power saving tech called FLCG. The nature of this tech is somewhat ambiguous, and may be a feature of the GPU or the memory controller
OFA:
Optical Flow Analyzer
Standard in Nvidia GPUs
Seems to match the same design as other Ampere cards
NVENC:
NVidia ENCoder, hardware accelerated video encoding
8th gen, as per Lovelace/Orin, instead of 7th gen as per Ampere
8th gen adds AV1 support
NVDEC:
NVidia DECoder, hardware accelerated video decoder
Version unknown, likely also supports AV1
APE:
Audio Processing Engine
Muxing/demuxing/multi-channel mixing/sampling/parametric equalizing
Has itty bitty teeny weeny low power ARM core for real time programmable audio effects
Hardware accelerated sound decoding for both lossless (LPCM) and lossy (AC3, DTS5.1, MPEG1, MPEG2, MP3, DD+, MPEG2/4 AAC,TrueHD, DTS-HD) formats
FDE:
File Decompression Engine
A totally new hardware block, exact feature set unknown
DisplayPort controller:
Two PCIe lanes, sufficient bandwidth for 4k HDR
USB Controller:
Up to 3 USB2/3 ports
UFS:
Some form of UFS controller, like UFS 4?
Nvidia has been slippery with the documentation on this for Orin, so it's hard to reverse engineer T239's support
eMMC:
On board eMMC controller, likely version 5
"Does this mean we get eMMC storage???" - no.
Switch uses eMMC as a sort of "bridge protocol" between the cartridge reader and the SOC.
PCIe lanes:
I believe there are 2 left unattached to anything?
One is likely for the BT/WiFi chip which will live outside the SOC
The other is probably for the Joy-Con rails
edit: posted too early